A Product Line of
Diodes Incorporated
ZXLD1371
Pin Descriptions
Pin
Name
Pin
Type
(Note 2)
Description
Adjust input (for dc output current control)
Connect to REF to set 100% output current.
ADJ
1
I
Drive with dc voltage (125mV<V ADJ < 1.25V) to adjust output current from 10% to 100%
of set value. The ADJ pin has an internal clamp that limits the internal node to less than
3V. This provides some failsafe should they get overdriven
REF
2
O
Internal 1.25V reference voltage output
Temperature Adjust input for LED thermal current control
Connect thermistor/resistor network to this pin to reduce output current above a preset
TADJ
3
I
temperature threshold.
Connect to REF to disable thermal compensation function. (See section on thermal
control.)
SHP
4
I/O
Shaping capacitor for feedback control loop
Connect 330pF ±20% capacitor from this pin to ground to provide loop compensation
Operation status output (analog output)
Pin is at 4.5V (nominal) during normal operation.
STATUS
5
O
Pin switches to a lower voltage to indicate specific operation warnings or fault
conditions. (See section on STATUS output.)
Status pin voltage is low during shutdown mode
SGND
PGND
N/C
N/C
GATE
6
7
8
9
10
P
P
-
O
Signal ground (Connect to 0V)
Power ground - Connect to 0V and pin 8 to maximize copper area
Not Connected internally – recommend connection to pin 7, (PGND), to maximize PCB
copper for thermal dissipation
Not Connected internally – recommend connection pin 10 (GATE) to permit wide copper
trace to gate of MOSFET
Gate drive output to external NMOS transistor – connect to pin 9
Auxiliary positive supply to internal switch gate driver
At V IN < 8V; a bootstrap circuit is recommended to ensure adequate gate drive voltage
(see Applications section)
V AUX
11
P
At V IN > 8V; connect to V IN
At V IN >24V; to reduce power dissipation, V AUX can be connected to an 8V to 15V
auxiliary power supply (see Applications section). Decouple to ground with capacitor
close to device (see Applications section)
V IN
12
P
Input supply to device 5V to 60V
Decouple to ground with capacitor close to device (refer to Applications section)
Current monitor input. Connect current sense resistor between this pin and V IN
ISM
13
I
The nominal voltage, V SENSE , across the resistor is 218mV fixed in Buck mode and
initially 225mV in Boost and Buck-Boost modes, varying with duty cycle.
Flag open drain output
FLAG
14
O
Pin is high impedance during normal operation
Pin switches low to indicate a fault, or warning condition
Digital PWM output current control
Pin driven either by open Drain or push-pull 3.3V or 5V logic levels.
PWM
15
I
Drive with frequency higher than 100Hz to gate output ‘on’ and ‘off’ during dimming
control.
The device enters standby mode when PWM pin is driven with logic low level for more
than 15ms nominal (Refer to application section for more details)
Gain setting input
Used to set the device in Buck mode or Boost, Buck-boost modes and to control the
sense voltage in Boost and Buck-boost modes
GI
16
I
Connect to ADJ pin for Buck mode operation
For Boost and Buck-boost modes, connect to resistive divider from ADJ to SGND. The
GI divider is required to compensate for duty cycle gating in the internal feedback loop
(see Application section). The GI pin has an internal clamp that limits the internal node to
less than 3V. This provides some failsafe should it become overdriven.
EP
PAD
P
Exposed paddle. Connect to 0V plane for electrical and thermal management
Notes:
2. Type refers to whether or not pin is an Input, Output, Input/Output or Power supply pin.
ZXLD1371
Document number: DS35436 Rev. 1 - 2
2 of 42
www.diodes.com
February 2012
? Diodes Incorporated
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